Graphite is an allotrope of carbon having a crystal structure that consists of a stack of planes of hexagonal rings formed by carbon atoms, a plane of rings being called graphene.
In the present application, the expression “graphene layer” will be understood to mean both a single plane of rings and a stack of a number of planes of rings in which each plane of rings is turned relative to the other planes of rings in the stack. Specifically, in the latter case, each plane of rings (graphene) has properties that are independent from those of the other planes of rings, thereby differentiating it from a graphite block in which each plane of rings has substantially the same properties as the other planes of rings.
Graphene possesses exceptional electronic properties and could revolutionize the field of electronics. However, graphene is a material that is difficult to isolate. Thus, in the last few years, many research projects have been conducted in an attempt to understand the electronic properties of graphene and to manufacture such a material.
Currently, two main processes are used to manufacture a graphene layer.
A first process, called the exfoliation process, consists in sampling a thin strip from a bulk graphite substrate using adhesive tape. This operation is carried out again on the strip thus sampled in order to obtain a new thinner strip. This process is repeated until samples of a single layer of atoms, i.e. a layer of graphene, are obtained.
However, this process proves to be difficult to implement from an industrial point of view.
A second process consists in forming a graphene layer on the surface of a silicon carbide substrate. The substrate is gradually heated until sublimation of the silicon in at least the first lattice-arrays of atoms in the substrate in order to form the graphene layer on the free surface of said substrate.
However, this process proves to be very expensive to implement since silicon carbide substrates come with a very high price tag.
Recently, a third process that is an improvement over the two aforementioned processes has been developed. This third process consists in forming a graphene layer on the surface of a substrate comprising a silicon layer, and comprises, in succession, steps of:                forming a silicon carbide film on a free surface of the silicon layer; and        gradually heating the substrate until sublimation of the silicon in at least the first lattice-arrays of atoms of the silicon carbide film, in order to form the graphene layer on the silicon carbide film.        
Forming a silicon carbide film allows a “tie” layer to be formed, enabling formation of the graphene. Using this type of substrate greatly decreases the cost of producing such a graphene layer since silicon substrates or substrates comprising a silicon layer are much less expensive than silicon carbide substrates.
However, it has been observed that graphene layers formed in this way contain many cracks. FIGS. 1a and 1b are photographs of a portion of a graphene layer formed using the third process described above, FIG. 1b being an enlargement of a region I of FIG. 1a. FIGS. 4a and 4b are drawings schematically reproducing the photographs illustrated in FIG. 1a and FIG. 1b, respectively. With reference to FIGS. 1a, 1b, 4a, 4b, cracks may clearly be seen.
In order to obtain a high-quality graphene layer, the graphene layer is then definitively separated into the various pieces defined by the cracks. Thus, only small pieces of graphene, of about 5 to 10 microns in diameter, may be formed using this process.
It has been proposed to improve the third process by heating the substrate under a controlled flow of argon.
The inventor has observed that this does not prevent cracks from forming.